FPD750SOT89

1TAmbient = 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause permanent damage to the device
2Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3Users should avoid exceeding 80% of 2 or more Limits simultaneously
4Total Power Dissipation defined as: PTOT (PDC + PIN) POUT,where PDC: DC Bias Power, PIN: RF Input Power, POUT: RF Output Power Total Power Dissipation to be de-rated as follows above 22°C:PTOT= 1.8 - (0.012W/°C) x TPACK where TPACK= source tab lead temperature above 22°C (coefficient of de-rating formula is the Thermal Conductivity) Example: For a 65°C carrier temperature: PTOT = 1.8W (0.012 x (65 22)) = 1.28W

The FPD750SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). FPD750SOT89 utilizes a 0.25 m x 750 m Schottky barrier Gate, defined by high-resolution stepper-based photolithography. The double recessed gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and i/p power levels.