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FPD750P100

Features: 26.5 dBm Linear Output Power18.5 dB Power Gain at 2 GHz11.5 dB Maximum Stable Gain at 10 GHz36 dBm Output IP345% Power-Added Efficiency at 2 GHzSpecifications Parameter Symbol Test Conditions Min Max Units Drain-Source Voltage VDS -3V < VGS < +0V 9 V Gate-S...

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SeekIC No. : 004343040 Detail

FPD750P100: Features: 26.5 dBm Linear Output Power18.5 dB Power Gain at 2 GHz11.5 dB Maximum Stable Gain at 10 GHz36 dBm Output IP345% Power-Added Efficiency at 2 GHzSpecifications Parameter Symbol Test...

FPD750P100 Data Sheet

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Part Number:
FPD750P100
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
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Product Details

Description



Features:

 26.5 dBm Linear Output Power
 18.5 dB Power Gain at 2 GHz
 11.5 dB Maximum Stable Gain at 10 GHz
 36 dBm Output IP3
 45% Power-Added Efficiency at 2 GHz


Specifications

Parameter Symbol Test Conditions Min Max Units
Drain-Source Voltage VDS -3V < VGS < +0V   9 V
Gate-Source Voltage VGS 0V < VDS < +8V   -3 V
Drain-Source Current IDS For VDS > 2V   IDSS mA
Gate Current IG Forward or reverse current   7.2  mA
RF Input Power2 PIN Under any acceptable bias state   175 mW
Channel Operating Temperature TCH Under any acceptable bias state   175 ºC
Storage Temperature TSTG Non-Operating Storage -40 150 ºC
Total Power Dissipation PTOT See De-Rating Note below   2.3 W
Gain Compression Comp. Under any bias conditions   5 dB
Simultaneous Combination of Limits3   2 or more Max. Limits   80 %

1TAmbient = 22°C unless otherwise noted 2Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: PTOT (PDC + PIN) POUT, where
                                                   PDC: DC Bias Power
                                                   PIN: RF Input Power
                                                   POUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
                                                   PTOT= 2.3W (0.0147W/°C) x THS
where THS = heatsink or ambient temperature.
Example: For a 85°C heatsink temperature: PTOT = 2.3W (0.0147 x (85 22)) = 1.37W


Description

The FPD750P100 is a packaged AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (PHEMT), featuring a 0.25 m by 750 m Schottky barrier gate, defined by high-resolution stepperbased photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable high-power applications. The FPD750P100 also features Si3N4 passivation and is also available in die form and in the low cost plastic SOT89, SOT343, and DFN plastic packages.

FPD750P100 applications include commercial and other narrowband and broadband high-performance amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters.




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