FMS9884A

Notes:
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if Operating Conditions are not exceeded.
2. Applied voltage must be current limited to specified range.
3. Forcing voltage must be limited to specified range.
4. Current is specified as conventional current flowing into the device.
5. EIAJ test method.

As a fully integrated analog interface, the FMS9884A can digitize RGB graphics with resolutions up to 1600 x 1200/65Hz refresh or 1600 x 1200/85Hz using alternate pixel sampling.

ADC sampling clock of FMS9884A can be derived from either an external source or incoming horizontal sync signal using the internal PLL. Output data is released through either one port at full rate or both ports, each running at half-rate. Setup and control is via registers, accessible through an SMBus/I ² C compatible serial port.

Input amplitude range of FMS9884A is 5001000mV with either DC or AC coupling. Lower reference of AC coupled inputs is established with input clamps that are either internally generated or externally provided.

Common to the three channels are clamp pulses, a bandgap reference voltage and clocks derived from a PLL or an external source. Digital data levels are 2.53.3 volt CMOS compliant.

Power of FMS9884A can be derived from a single +3.3 Volt power supply. For 175 MHz applications see special V_PLL requirements. Package is a 128-lead MQFP. Performance specifications are guaranteed over 0 to 70 range.