FI1216MK2

Features: · System CCIR B/G· True 5 V device (low power dissipation)· Full frequency range from channel 2 (48.25 MHz) to channel 69 (855.25 MHz)· PLL controlled tuning· True-synchronous vision IF demodulator (PLL)· Demodulated video output, AF sound output, second sound IF output· I2C-bus control ...

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SeekIC No. : 004341597 Detail

FI1216MK2: Features: · System CCIR B/G· True 5 V device (low power dissipation)· Full frequency range from channel 2 (48.25 MHz) to channel 69 (855.25 MHz)· PLL controlled tuning· True-synchronous vision IF de...

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Part Number:
FI1216MK2
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/19

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Product Details

Description



Features:

· System CCIR B/G
· True 5 V device (low power dissipation)
· Full frequency range from channel 2 (48.25 MHz) to channel 69 (855.25 MHz)
· PLL controlled tuning
· True-synchronous vision IF demodulator (PLL)
· Demodulated video output, AF sound output, second sound IF output
· I2C-bus control of tuning, address selection, AFC status information
· Complies with European regulations on radiation, signal handling and immunity ("CENELEC 55020, 55013" and "Amtsblatt 15/92")
· Small horizontally mounted metal housing.



Specifications

SYMBOL PARAMETER PIN MIN. TYP. MAX. UNIT
VS supply voltage 12 4.75 5.00 5.25 V
VS(ripple) peak-to-peak ripple voltage susceptibility (at 5 V ±5%); note 1
20 Hz to 100 kHz
>100 kHz to 500 kHz
-
-
-
-
20
10
mV
mV
IS supply current - - 120 mA
VSCL SCL bus input voltage 13 -0.3 - +5.25 V
VSDA SDA bus input voltage 14 -0.3 - +5.25 V
ISDA SDA bus current (open collector) -1 - +5 mA
VAS address select voltage; note 2 15 - - +5.25 V
ZIF 2nd IF sound output load impedance:
DC
AC
22
0.5
0.5

-
-

-
-

k
k
ZCVBS Composite Video Baseband Signal load impedance:
DC
AC
23
-
-

75
75

-
-


tL load time constant - - 100 ns
VIF IF supply voltage 24 4.75 5.0 5.25 V
VIF(ripple) peak-to-peak ripple voltage susceptibility (at 5 V ±5%); note 1
20 Hz to 100 kHz
>100 kHz to 500 kHz

-
-

-
-

20
10

mV
mV
IIF IF supply current - - 100 mA
ZAF AF sound output load impedance:
DC
AC
25
1.0
0.6

-
-

-
-

k
k
Notes
1. Sinusoidal ripple voltage superimposed on the 5 V supply voltage in the frequency range of 20 Hz to 500 kHz. Criteria for TV interference >57 dB.
2. For detailed information about the address decoding, refer to Chapter "Application information".



Description

The FI1200MK2 family consists of the following types FI1216MK2, FI1246MK2, FI1256MK2. They are designed to meet a wide range of RF applications in the PC Multi-Media environment.

The FI1216MK2 types are available with a single 75 input for TV reception. The input connector is available in either standard phono (female socket) or IEC (female socket).

The tuning and bandswitching of FI1200MK2 family are performed through the built-in digitally controlled I2C-bus. All front-ends meet the input immunity and radiation of CENELEC.

The FI1216MK2 consists of a tuner section and an IF section, which are all designed on a single PCB. The front-end is assembled in a metal housing made of a rectangular tin plated steel frame with front and rear covers which have soldered contacts to the frame. A single phono or IEC aerial socket is mounted on one side of the frame. All other connections are made via pins at the bottom.

The tuner section is equipped with 3 tuned RF MOSFET input stages, with a 3-band mixer-oscillator IC, containing the oscillators, mixers and IF amplifier. Tuning and band switching in the tuner section are done with a digital programmable PLL tuning system. FI1200MK2 family enables tuning with step-size programmable between 31.25, 50.0 or 62.5 kHz. A DC-DC converter is built around the PLL synthesizer IC to provide the tuning voltage, thus making the FI1216MK2 front-end a true 5 V device. The IF section uses a true-synchronous vision IF demodulator (PLL) with an intercarrier SAW filter in front of it.

The analog AFC voltage of FI1200MK2 family is fed to the 5-level A/D converter in the PLL tuning IC, so that the AFC status can be read via the I2C-bus.


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