Features: ` Systems CCIR L/L' and B/G` True 5 V device (low power dissipation)` Full frequency range from channel 2 (48.25 MHz) to channel 69 (855.25 MHz)` PLL controlled tuning` True-synchronous vision IF demodulator (PLL)` Demodulated video output, AF sound output, second sound IF output` I2C-bu...
FI1216MF: Features: ` Systems CCIR L/L' and B/G` True 5 V device (low power dissipation)` Full frequency range from channel 2 (48.25 MHz) to channel 69 (855.25 MHz)` PLL controlled tuning` True-synchronous vi...
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The FI1200MK2 family of front ends are designed to meet a wide range of RF applications in the PC Multi-Media environment.
The FI1216MF MK2 type are available with a single 75 W input for TV reception. The input connector is available in either standard phono (female socket) or IEC (female socket).
The tuning and bandswitching are performed through the built-in digitally controlled I2C-bus. All front ends meet the
input immunity and radiation requirements of CENELEC.
The FI1216MF MK2 consists of a tuner section and an IF section, which are all designed on a single PCB. The front-end is assembled in a metal housing made of a rectangular tin plated steel frame with front and rear covers which have soldered contacts to the frame. A single phono or IEC aerial socket is mounted on one side of the frame. All other connections are made via pins at the bottom.
The tuner section is equipped with 3 tuned RF MOSFET input stages, with a 3-band mixer-oscillator IC, containing the oscillators, mixers and IF amplifier. Tuning and band switching in the tuner section are done with a digital programmable PLL tuning system. FI1216MF enables tuning with step-size programmable between 31.25, 50.0 or 62.5 kHz. A DC-DC converter is built around the PLL synthesizer IC to provide the tuning voltage, thus making
the FI1216MF MK2 front-end a true 5 V device.
The IF section FI1216MF uses a true-synchronous vision IF demodulator (PLL) with an intercarrier SAW filter in front of it. The analog AFC voltage is fed to the 5-level A/D converter in the PLL tuning IC, so that the AFC status can be read via the I2C-bus.