IC MAX 7000 CPLD 64 100-TQFP
EPM7064STC100-7: IC MAX 7000 CPLD 64 100-TQFP
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Series: | MAX® 7000 | Manufacturer: | Altera | ||
Programmable Type: | In System Programmable | Delay Time tpd(1) Max: | 7.5ns | ||
Available Set Gain : | 12 dB | Voltage Supply - Internal: | 4.75 V ~ 5.25 V | ||
Number of Logic Elements/Blocks: | 4 | Number of Macrocells: | 64 | ||
Number of Gates: | 1250 | Number of I /O: | 68 | ||
Operating Temperature: | 0°C ~ 70°C | Mounting Type: | Surface Mount | ||
Package / Case: | 100-TQFP | Supplier Device Package: | 100-TQFP (14x14) |
The EPM7064STC100-7 is belongoing to the MAX 7000 family, which is fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family offers 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns,and counter speeds of reach to 175.4 MHz. MAX 7000S devices in the -5, -6,-7, and -10 speed grades as well as MAX 70 00 and MAX 7000E devices in-5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest Group (PCI SIG) .
Features of the EPM7064STC100-7 are:(1)high-performance, EEPROM-based programmable logic devices(PLDs) bas ed on second-generation MAX architecture;(2) 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices;(3)includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices;(4)built-in JTAG boundary-scan test (BST) circuitry in MAX 7000Sdevices with 128 or more macrocells;(5)complete EPLD family with logic densities ranging from 600 to 5,000 usable gates;(6)5-ns pin-to-pin logic delays with up to 175.4-MHz counter
frequencies;(7)PCI-compliant devices available.
The absolute maximum ratings of the EPM7064STC100-7 can be summarized as:(1):supply voltage is-2.0V min and 7.0V max with respect to ground ;(2):DC input voltage is 2.0V min and 7.0 V max;(3):DC output current,per pin is 25mA min and 25 mA max;(4):storage temperature(no bias) is65° C to 150°C; (5):ambient temperature (Under bias)is65°C min and 135°C max;(6):junction temperature (ceramic packages, under bias) is 150° C max,junction temperature (PQFP and RQFP packages, under bias) is 135°C max.
Technical/Catalog Information | EPM7064STC100-7 |
Vendor | Altera |
Category | Integrated Circuits (ICs) |
Programmable Type | In System Programmable |
Number of Macrocells | 64 |
Number of I /O | 68 |
Number of Logic Blocks/Elements | 4 |
Operating Temperature | 0°C ~ 85°C |
Package / Case | 100-TQFP |
Features | - |
Voltage | 5V |
Memory Type | EEPROM |
Delay Time tpd(1) Max | 3.5nS |
Packaging | Tray |
Lead Free Status | Contains Lead |
RoHS Status | RoHS Non-Compliant |
Other Names | EPM7064STC100 7 EPM7064STC1007 544 2312 ND 5442312ND 544-2312 |