EN25B64

The EN25B64 is a 64M-bit (8192K-byte) Serial Flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.The EN25B64 has one hundred twenty-eight sectors including one hundred twenty-seven sectors of 64KB, one sector of 32KB, one sector of 16KB, one sector of 8KB and two sectors of 4KB. This device is designed to allow either single Sector at a time or full chip erase operation. The EN25B64 can protect boot code stored in the small sectors for either bottom or top boot configurations. The device can sustain a minimum of 100K program/erase cycles on each sector.

Features of the EN25B64 are:(1)lockable 512 byte OTP security sector; (2)minimum 100K endurance cycle; (3)industrial temperature range; (4)write protect all or portion of memory via software; (5)enable/disable protection with WP# pin.The SPI Serial Data Input (DI) pin provides a means for instructions, addresses and data to be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK) input pin.

The absolute maximum ratings of the EN25B64 can be summarized as:(1)storage temperature:-65 to 125;(2)plastic packages:-65 to 125;(3)output short circuit current:200mA;(4)input and output voltage:-0.5 to 4.0 V;(5)Vcc:-0.5 to 4.0V.Stresses above the values so mentioned above may cause permanent damage to the device. These values are for a stress rating only and do not imply that the device should be operated at conditions up to or above these values. Exposure of the device to the maximum rating values for extended periods of time may adversely affect the device reliability.Every instruction sequence starts with a one-byte instruction code. Depending on the instruction, this might be followed by address bytes, or by data bytes, or by both or none. Chip Select (CS#) must be driven High after the last bit of the instruction sequence has been shifted in. In the case of a Read Data Bytes (READ), Read Data Bytes at Higher Speed (Fast_Read), Read Status Register (RDSR) or Release from Deep Power-down, and Read Device ID (RDI) instruction, the shifted-in instruction sequence is followed by a data-out sequence. Chip Select (CS#) can be driven High after any bit of the data-out sequence is being shifted out.