EDE1108ACSE-5C-E

The EDE1108ACSE-5C-E is a type of 1G bits DDR2 sdram which has many unique features: (1) double-data-rate architecture; (2) the high-speed data transfer is realized by the 4 bits prefetch pipelined architecture; (3) bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver; (4) DQS is edge-aligned with data for READs; centeraligned with data for WRITEs; (5) differential clock inputs (CK and /CK); (6) DLL aligns DQ and DQS transitions with CK transitions; (7) data mask (DM) for write data; (8) posted /CAS by programmable additive latency for better command and data bus efficiency; (9) off-chip-driver impedance adjustment and on-die-termination for better signal quality; (10) programmable RDQS, /RDQS output for making × 8 organization compatible to × 4 organization.

There are some absolute maximum ratings about EDE1108ACSE-5C-E. (1): power supply voltage(VDD) is −1.0 V to +2.3 V; (2): power supply voltage for output(VDDQ) is −0.5 V to +2.3 V; (3): input voltage(VIN) is −0.5 V to +2.3 V; (4): output voltage(VOUT) is −0.5 V to +2.3 V; (5): storage temperature(Tstg) is −55°C to +100°C; (6): power dissipation(PD)is 1.0 W; (7) short circuit output current(IOUT) is 50 mA.

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