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DS3181

Network Controller & Processor ICs Sgl ATM/Packet PHYs w/Built-In LIU

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SeekIC No. : 00321942 Detail

DS3181: Network Controller & Processor ICs Sgl ATM/Packet PHYs w/Built-In LIU

DS3181 Data Sheet

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Part Number:
DS3181
Mfg:
Maxim Integrated Products
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Quick Details

Product : Framer Number of Transceivers : 1
Data Rate : 44.736 Mbps Supply Current (Max) : 280 mA
Maximum Operating Temperature : + 70 C Mounting Style : SMD/SMT
Package / Case : TEBGA    

Description

Packaging :
Number of Transceivers : 1
Mounting Style : SMD/SMT
Product : Framer
Maximum Operating Temperature : + 70 C
Data Rate : 44.736 Mbps
Package / Case : TEBGA
Supply Current (Max) : 280 mA


Features:

·Single (DS3181), Dual (DS3182), Triple (DS3183), or Quad (DS3184) with Integrated LIU ATM/Packet PHYs for DS3, E3, and Clear-Channel 52Mbps (CC52)
·Pin Compatible for Ease of Port Density Migration in the Same PC Board Platform
·Each Port Independently Configurable
·Perform Receive Clock/Data Recovery and Transmit Waveshaping
·Jitter Attenuator can be Placed Either in the Receive or Transmit Paths
·Interfaces to 75 Coaxial Cable at Lengths Up to 380 Meters or 1246 Feet (DS3) or 440 Meters or 1443 Feet (E3)
·Uses 1:2 Transformers on Both Tx and Rx
·Universal PHYs Map ATM Cells and/or HDLC Packets into DS3 or E3 Data Streams
·UTOPIA L2/L3 or POS-PHY™ L2/L3 or SPI-3 Interface with 8-, 16-, or 32-Bit Bus Width
·66MHz UTOPIA L3 and POS-PHY L3 Clock
·52MHz UTOPIA L2 and POS-PHY L2 Clock
·Ports Independently Configurable for Cell or Packet Traffic in POS-PHY Bus Modes
·Direct, PLCP, DSS, and Clear-Channel Cell Mapping


Application

·Access Concentrators  Multiservice Access
·SONET/SDH ADM            Platform (MSAP)
·SONET/SDH Muxes   Multiservice Protocol
·PBXs                             Platform (MSPP)
·Digital Cross Connect  ATM and Frame Relay
·Test Equipment                  Equipment
·Routers and Switches PDH Multiplexer/
·Integrated Access        Demultiplexer
·Device (IAD)


Specifications

Voltage Range on Any Input, Bidirectional, or Open-Drain
Output Lead with Respect to VSS............-0.3V to +5.5V
Supply Voltage (VDD) with Respect to VSS.......-0.3V to +3.63V
Ambient Operating Temperature Range.........-40 to +85
Junction Operating Temperature Range ........-40 to +125
Storage Temperature Range..............-55 to +125
Soldering Temperature Range.See IPC/JEDEC J-STD-020 Specification.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect device reliability. Ambient Operating Temperature Range is assuming the device is mounted on a JEDEC standard test board in a convection cooled JEDEC test enclosure.
Note: The typical values listed below are not production tested.


Description

The DS3181, DS3182, DS3183, and DS3184 (DS318x) integrate  ATM cell/HDLC packet processor(s) with a DS3/E3 framer(s) and LIU(s) to map/demap ATM cells or packets into as many as four DS3/E3 physical copper lines with DS3-framed, E3-framed, or clear-channel data streams on per-port basis.




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