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CY7B9973V

Features: • 10-MHz 200-MHz output operation• Output-to-output skews < 350 ps• 13 LVTTL 50% duty-cycle outputs capable of driving 50 terminated lines• Phase-locked loop (PLL) LOCK indicator• 3.3V LVTTL/LV differential (LVPECL) hot insertable reference inputs•...

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SeekIC No. : 004319583 Detail

CY7B9973V: Features: • 10-MHz 200-MHz output operation• Output-to-output skews < 350 ps• 13 LVTTL 50% duty-cycle outputs capable of driving 50 terminated lines• Phase-locked loop (P...

CY7B9973V Data Sheet

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Part Number:
CY7B9973V
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 10-MHz 200-MHz output operation
• Output-to-output skews < 350 ps
• 13 LVTTL 50% duty-cycle outputs capable of driving 50 terminated lines
• Phase-locked loop (PLL) LOCK indicator
• 3.3V LVTTL/LV differential (LVPECL) hot insertable reference inputs
• Multiply/divide ratios of (4, 6, 8, 10, 12, 16, 20):(2, 4, 6, 8, 10, 12, 16, 20)
• Operation with outputs operating at up to 10x input frequenc
• Low cycle-to-cycle jitter (< ±75 ps peak-peak)
• Single 3.3V ± 10% supply
• Pin-compatible with Motorola MPC973
• 52-pin TQFP package


Pinout

Connection Diagram


Specifications

Storage Temperature .................................40°C to +150°C
Ambient Temperature with Power Applied .40°C to +125°C
Supply Voltage to Ground Potential ............. 0.5V to +4.6V
DC Input Voltage...................................0.3V to VCC + 0.5V
Output Current into Outputs (LOW).......................... 40 mA
Static Discharge Voltage.........................................> 2000V
(per MIL-STD-883, Method 3015)
Latch-up Current................................................... ±200 mA


Description

The CY7B9973V Low-Voltage PLL Clock Buffer offers user-selectable frequency control over system clock functions. CY7B9973V twelve output clock driver provides the system integrator selectable frequency ratios of 1:1, 2:1, 3:1, 3:2, 4:3, 5:1, 5:2, 5:3, 6:1 and 6:5 between outputs.

An additional output of CY7B9973V is dedicated to providing feedback information to allow the internal PLL to multiply an external reference frequency by 4, 6, 8, 10, 12, 16 or 20. The completely integrated PLL reduces jitter and simplifies board layout. The thirteen configurable outputs of CY7B9973V can each drive terminated transmission lines with impedances as low as 50 while delivering minimal and specified output skews at LVTTL levels.

The CY7B9973V has a flexible reference input scheme with three different hot-insertion capable inputs. These inputs allow the use of either differential LVPECL or single-ended LVTTL inputs which can be dynamically selected to provide the reference frequency.




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