CY7B9940V

The CY7B9930V and CY7B9940V High-Speed Multi- Frequency PLL Clock Buffers offer user-selectable control over system clock functions. This multiple-output clock driver CY7B9930V and CY7B9940V provides the system integrator with functions necessary to optimize the timing of high-performance computer or communication systems.

Ten configurable outputs of CY7B9930V and CY7B9940V can each drive terminated transmission lines with impedances as low as 50 while delivering minimal and specified output skews at LVTTL levels. The outputs of CY7B9930V and CY7B9940V are arranged in three banks. The FB feedback bank consists of two outputs, which allows divide-by functionality from 1 to 12. Any one of these ten outputs can be connected to the feedback input as well as driving other inputs.

Selectable reference input of CY7B9930V and CY7B9940V is a fault tolerance feature that allows smooth change over to secondary clock source, when the primary clock source is not in operation. The reference inputs of CY7B9930V and CY7B9940V are configurable to accommodate both LVTTL or Differential (LVPECL) inputs. The completely integrated PLL reduces jitter and simplifies board layout.