CS8412

Features:

·Monolithic CMOS Receiver
·Low-Jitter, On-Chip Clock Recovery 256x Fs Output Clock Provided
·Supports: AES/EBU, IEC958, S/PDIF, & EIAJ CP-340 Professional and Consumer Formats
·Extensive Error Reporting
   - Repeat Last Sample on Error Option
·On-Chip RS422 Line Receiver
·Configurable Buffer Memory (CS8411)


Pinout

Specifications

Parameter	Symbol	Min	Max	Units
Power Supply Voltage	VD+, VA+		6.0	V
Input Current, Any Pin Except Supply                 Note 1	Iin		± 10	mA
Input Voltage, Any Pin except RXP, RXN	VIN	-0.3	VD+ + 0.3	V
Input Voltage, RXP and RXN	VIN	-12	12	V
Ambient Operating Temperature (power applied)	TA	-55	125
Storage temperature	Tstg	-65	55 to +125

Notes: 1. Transient currents of up to 100 mA will not cause SCR latch-up.

WARNING: Operation beyond these limits may result in permanent damage to the device. Normal operation is
                  not guaranteed at these extremes.


Description

The CS8411/12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/12 receive data from a transmission line, recover the clock and synchronization signals, and demultiplex the audio and digital data. Differential or single ended inputs can be decoded.

The CS8411 has a configurable internal buffer memory, read via a parallel port, which may be used to buffer channel status, auxiliary data, and/or user data.

The CS8412 de-multiplexes the channel, user, and validity data directly to serial output pins with dedicated output pins for the most important channel status bits.