COP8TAC9 Selling Leads, Price trend, COP8TAC9 DataSheet download, circuit diagram from SeekIC.com

Features: ` 2k bytes or 4k bytes Flash Program Memory, with Security Feature, organized in 512 byte pages that can be erased or written individually` 128 bytes volatile RAM` 2.25V 2.75V In-System Programmability of Flash` High endurance - 20k Erase/Write Cycles` Superior Data Retention - 100 year...

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SeekIC No. : 004315399 Detail

COP8TAC9: Features: ` 2k bytes or 4k bytes Flash Program Memory, with Security Feature, organized in 512 byte pages that can be erased or written individually` 128 bytes volatile RAM` 2.25V 2.75V In-System P...

COP8TAC9 Data Sheet

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Part Number:: COP8TAC9
Supply Ability:: 5000

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Upload time: 2024/12/25

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Product Details

Description

Features:

` 2k bytes or 4k bytes Flash Program Memory, with Security Feature, organized in 512 byte pages that can be erased or written individually
` 128 bytes volatile RAM
` 2.25V 2.75V In-System Programmability of Flash
` High endurance - 20k Erase/Write Cycles
` Superior Data Retention - 100 years
`Crystal Oscillator at 15 MHz or Integrated RC Oscillator at 10MHz
` Clock Prescaler For Adjusting Power Dissipation to Processing Requirements
` Power-On Reset
` HALT/IDLE Power Save Modes
` One 16-bit timer:
- Processor Independent PWM mode
- External Event counter mode
- Input Capture mode
` High Current I/Os
- 10 mA @ 0.4V
`Single supply operation:
- 2.25V2.75V (−40 to +85)
` Quiet Design (low radiated emissions)
` Multi-Input Wake-Up with optional interrupts
` MICROWIRE/PLUS (Serial Peripheral Interface Compatible)
` ACCESS.Bus Synchronous Serial Interface (compatible with I2C™ and SMBus™)
- Master Mode and Slave Mode
- Full Master Mode Capability
- Bus Speed Up To 400KBits/Sec
- Low Power Mode With Wake-Up Detection
- Optional 1.8V ACCESS.Bus Compatibility
` Eight multi-source vectored interrupts servicing:
- External Interrupt
- Idle Timer T0
- One Timers (with 2 interrupts)
- MICROWIRE/PLUS Serial peripheral interface
- ACCESS.Bus/I²C/SMBus compatible Synchronous
Serial Interface
- Multi-Input Wake-Up
- Software Trap
` Idle Timer with programmable interrupt interval
` 8-bit Stack Pointer SP (stack in RAM)
` Two 8-bit Register Indirect Data Memory Pointers
`True bit manipulation
` WATCHDOG and Clock Monitor logic
` Software selectable I/O options
- TRI-STATE Output/High Impedance Input
- Push-Pull Output
- Weak Pull Up Input
` Schmitt trigger inputs on I/O ports
` Temperature range: 40 to +85
` Packaging: 20 and 28 SOIC and 44 LLP

Pinout

Connection Diagram

Specifications

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V_CC) 3.5V
Voltage at Any Pin −0.3V to V_CC +0.3V
ESD Protection Level
(Human Body Model)2 kV

(Machine Model) 200V

Total Current into V_CC Pin (Source) 80 mA
Total Current out of GND Pin
(Sink) 60 mA
Storage Temperature Range −65 to +140
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.

Temperature Min	-40 deg C
Temperature Max	85 deg C
Code Memory	4000 Bytes
Code Type	Flash
RAM Size Bytes	128 Bytes
I/O	40
Halt/Idle	Yes
Wakeup	Yes
TO Timer	Yes
Supply Min	2.25 Volt
Supply Max	2.75 Volt
Interrupts	8
Power on Reset	Yes
Watchdog/Clock Monitor	Yes
Interface Type	Microwire
CAN	No
With TempSensor	No
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Description

The COP8TAB9/TAC9 Flash microcontrollers are highly integrated COP8™ Feature core devices, with 2k or 4k Flash memory and advanced features. These single-chip CMOS devices are suited for applications requiring a full featured, in-system reprogrammable controller with moderate memory and low EMI. The same device is used for development, pre-production and volume production with a range of COP8 software and hardware development tools.

A Masked ROM device (COP8TAB5/TAC5) has been developed and provides identical features except for the Boot ROM and Flash Memory and related features such as In- System Programming and reprogrammability. The ROM device is supported, in emulation, by this device.

The lack of the Boot ROM and Flash Memory in the ROM device, prompts us to caution the user, utilizing the COP8TAx9 Flash based devices during development for applications to be produced using the COP8TAx5 ROM devices, to ensure that code contains NO calls to Boot ROM functions prior to submission for ROM generation. Instances of the JSRB instruction in ROM based devices will be executed as a JSR instruction to a location in the first 256 bytes of Program Memory.

COP8TAC9

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