CAT28LV65

The CAT28LV65 is a low voltage, low power, CMOS parallel EEPROM organized as 8K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and V_CC power up/down write protection eliminate additional timing and protection hardware. DATA Polling, RDY/BUSY and Toggle status bit signal the start and end of the self-timed write cycle. Additionally, the CAT28LV65 features hardware and software write protection.

The CAT28LV65 is manufactured using Catalyst's advanced CMOS floating gate technology. CAT28LV65 is designed to endure 100,000 program/erase cycles and has a data retention of 100 years. The device is available in JEDEC approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-pin PLCC packages.