CAT28F002

Fast Read Access Time: 90/120/150 ns
On-Chip Address and Data Latches
Blocked Architecture:
         - One 16-KB Protected Boot Block
                     • Top or Bottom Locations
         - Two 8-KB Parameter Blocks
         - One 96-KB Main Block
         - One 128-KB Main Block
Hardware Data Protection
Automated Program and Erase Algorithms
Automatic Power Savings Feature
Low Power CMOS Operation
12.0V ± 5% Programming and Erase Voltage
Electronic Signature
100,000 Program/Erase Cycles and 10 Year Data Retention
Standard Pinouts:
           - 40-Lead TSOP
           - 40-Lead PDIP
High Speed Programming
Commercial, Industrial and Automotive Temperature Ranges
Reset/Deep PowerDown Mode
            - 0.2mA I_CC Typical
            - Acts as Reset for Boot Operations

Temperature Under Bias ................................................. 55°C to +95°C
Storage Temperature .................................................... 65°C to +150°C
Voltage on Any Pin with Respect to Ground⁽¹⁾ .......... 2.0V to +VCC + 2.0V
Voltage on Pin A9 with Respect to Ground⁽¹⁾ .................... 2.0V to +13.5V
V_PP with Respect to Ground during Program/Erase⁽¹⁾ ....... 2.0V to +14.0V
V_CC with Respect to Ground⁽¹⁾ ............................................ 2.0V to +7.0V
Package Power Dissipation Capability (T_A = 25°C) ............................ 1.0 W
Lead Soldering Temperature (10 secs) ............................................. 300°C
Output Short Circuit Current⁽²⁾ ......................................................... 100 mA

The CAT28F002 is a high speed 256K X 8-bit electrically erasable and reprogrammable Flash memory ideally suited for applications requiring in-system or after sale code updates.

The CAT28F002 has a blocked architecture with one 16 KB Boot Block, two 8 KB Parameter Blocks, one 96 KB Main Block and one 128 KB Main Block. The Boot Block section can be at the top or bottom of the memory map. The Boot Block section includes a reprogramming write lock out feature to guarantee data integrity. It is designed to contain secure code which will bring up the system minimally and download code to other locations of CAT28F002.

The CAT28F002 is designed with a signature mode which allows the user to identify the IC manufacturer and device type. The CAT28F002 is also designed with on-Chip Address Latches, Data Latches, Programming and Erase Algorithms. A deep power-down mode lowers the total Vcc power consumption 1mw typical.

The CAT28F002 is manufactured using Catalyst's advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 10 years. The device is available in JEDEC approved 40-pin TSOP and 40-pin PDIP packages.