BS616LV4017

Features:

• Wide Vcc operation voltage : 2.4~5.5V
• Very low power consumption :
   Vcc = 3.0V   C-grade: 26mA (@55ns) operating current
                      I-grade: 27mA (@55ns) operating current
                     C-grade: 21mA (@70ns) operating current
                     I-grade: 22mA (@70ns) operating current
                     0.45uA (Typ.) CMOS standby current
   Vcc = 5.0V  C-grade: 63mA (@55ns) operating current
                     I-grade: 65mA (@55ns) operating current
                     C-grade: 53mA (@70ns) operating current
                     I-grade: 55mA (@70ns) operating current
                     2.0uA (Typ.) CMOS standby current
• High speed access time :
   -55     55ns
   -70     70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation

• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin

Pinout




Description

  The BS616LV4017 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 16 bits and operates from a wide range of 2.4V to 5.5V supply voltage.
  Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.45uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC.
  Easy memory expansion is provided by an active LOW chip enable (CE),active LOW output enable(OE) and three-state output drivers.
  The BS616LV4017 has an automatic power down feature, reducing the power consumption significantly when chip is deselected.
  The BS616LV4017 is available in DICE form, JEDEC standard 44-pin TSOP Type II package and 48-ball BGA package.