BS616LV2013

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The BS616LV2013 is a high performance, very low power CMOS Static Random Access Memory organized as 131,072 words by 16 bits and operates from a wide range of 2.4V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques of BS616LV2013 provide both high speed and low power features with a typical CMOS standby current of 0.1uA and maximum access time of 70/100ns in 3V operation. Easy memory expansion is provided by active LOW chip enable(CE), active LOW output enable(OE) and three-state output drivers.

The BS616LV2013 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV2013 is available in DICE form, JEDEC standard 44-pin TSOP Type II package , JEDEC standard 48-pin TSOP Type I package and 48-ball BGA package.