BCM1250

Description

Broadcom's first SiByte™ processor, the BCM1250, is a state-of-the-art multi-processor solution targeted at the fast-growing networking and communications markets.

The BCM1250 is the first MIPS64™ processor to offer the industry-leading performance, high functional integration, and low power levels required by next-generation networking applications.

The BCM1250 is an intelligent on-chip multi-processor system (CMP) consisting of two Broadcom SB-1 high performance MIPS64 CPUs, a shared 512K L2 cache, a DDR memory controller, and integrated I/O. All major blocks of the processor are connected together via the ZBbus™, a high-speed, split-transaction multi-processor bus. The bus of BCM1250 implements the standard MESI protocol to ensure coherency between the two CPUs, L2 cache, I/O agents, and memory. Three Gigabit Ethernet MACs (10/100/1000) enable easy interfacing to LANs. To enable higher data rates, or in cases where Ethernet protocol processing is not required, the MACs can be configured as either three 8-bit or two 16-bit packet FIFOs. High speed I/O is provided using AMD's HyperTransport (LDT) I/O fabric and a 33/66MHz PCI (rev 2.2) local bus. Two serial ports are provided for WAN connections at up to T3/E3/OC-1 data rates.