Am49LV6408M

MCP Features
Power supply voltage of 2.7 to 3.3 volt
High Performance
- Access time as fast as 100ns initial 5 ns page  Flash 55 ns pSRAM
Package
- 69-Ball FBGA
- Look ahead pinout for simple migration
- 8 x 10 x 1.2 mm
Operating Temperature
- 40°C to +85°C

Flash Memory Features
ARCHITECTURAL ADVANTAGES
Single power supply operation
- 3 V for read, erase, and program operations
Manufactured on 0.23 m MirrorBit process technology
SecSi™ (Secured Silicon) Sector region
- 128-word sector for permanent, secure identification through an 8-word random Electronic Serial Number, accessible through a command sequence
- May be programmed and locked at the factory or by the customer
Flexible sector architecture
- One hundred twenty seven 32 Kword sectors
- Eight 4 Kword boot sectors
Compatibility with JEDEC standards
- Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection
Minimum 100,000 erase cycle guarantee per sector
20-year data retention at 125°C

PERFORMANCE CHARACTERISTICS
High performance
- 100 ns access time
- 35 ns page read times
- 0.5 s typical sector erase time
- 22 s typical write buffer word programming time: 16-word write buffer reduces overall programming time for multiple-word updates
- 4-word page read buffer
- 16-word write buffer
Low power consumption (typical values at 3.0 V, 5 MHz)
- 30 mA typical initial Page read current; 10 mA typical intra-Page read current
- 50 mA typical erase/program current
- 1 A typical standby mode current

SOFTWARE & HARDWARE FEATURES
Software features
- Program Suspend & Resume: read other sectors before programming operation is completed
- Erase Suspend & Resume: read/program other sectors before an erase operation is completed
- Data# polling & toggle bits provide status
- Unlock Bypass Program command reduces overall multiple-word programming time
- CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices
Hardware features
- Sector Group Protection: hardware-level method of preventing write operations within a sector group
- Temporary Sector Unprotect: VID-level method of changing code in locked sectors
- WP#/ACC input:
Write Protect input (WP#) protects top or bottom two sectors regardless of sector protection settings ACC (high voltage) accelerates programming time for higher throughput during system production
- Hardware reset input (RESET#) resets device pSRAM Features
As fast as 55ns access time
Power dissipation
- Operating: 23 mA maximum
- Standby: 60 A maximum at 3.0 V
CE1ps# and CE2ps Chip Select
Power down features using CE1ps# and CE2ps
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ7DQ0), UB#s (DQ15DQ8)

Storage Temperature
Plastic Packages . . . . . . . .. . . 65°C to +150°C
Ambient Temperature
with Power Applied. . . . . . . . . 65°C to +125°C
Voltage with Respect to Ground
V_CCf/V_CCs (Note 1) . . . . . . . . .. . .0.3 V to +4.0 V
RESET#f (Note 2). . . . . . . . . . . .0.5 V to +12.5 V
WP#/ACC . . . . . . . . . . . . . . . .  .0.5 V to +10.5 V
All other pins (Note 1) . . . . . 0.5 V to V_CC +0.5 V
Output Short Circuit Current (Note 3) . .  . . 200 mA

The Am49LV6408M is a 64 Mbit, 3.0 volt single power supply flash memory device organized as 4,194,304 words. The device has an 16-bit bus and can be programmed either in the host system or in standard EPROM programmers.

Each Am49LV6408M requires only a single 3.0 volt power supply for both read and write functions. In addition to a VCC input, a high-voltage accelerated program (ACC) feature provides shorter programming times through increased current on the WP#/ACC input. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired.

Am49LV6408M is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations.

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. Am49LV6408M is fully erased when shipped from the factory.

Device programming and erasure are initiated through command sequences. Once a program or erase operation has begun, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four.

Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system or via programming equipment.

The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation.

The hardware RESET# pin terminates any operation in progress and resets the Am49LV6408M, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device.