Am41LV3204M

MCP Features
Power supply voltage of 2.7 to 3.3 volt
High Performance
- Access time as fast as 100ns initial 30 ns page Flash 70 ns SRAM
Package
- 69-Ball FBGA
- 8 x 10 x 1.2 mm
Operating Temperature
- 40 to +85

Flash Memory Features
ARCHITECTURAL ADVANTAGES
Single power supply operation
- 3 V for read, erase, and program operations
Manufactured on 0.23 m MirrorBit process technology
SecSi (Secured Silicon) Sector region
- 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence
- May be programmed and locked at the factory or by the customer
Flexible sector architecture
- Sixty-three 32 Kword/64-kbyte sectors
- Eight 4 Kword/8-kbyte boot sectors
Compatibility with JEDEC standards
- Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection
Minimum 100,000 erase cycle guarantee per sector
20-year data retention at 125

PERFORMANCE CHARACTERISTICS
High performance
- 100 ns access time
- 30 ns page read times
- 0.5 s typical sector erase time
- 15 s typical write buffer word programming time: 16-word/32-byte write buffer reduces overall programming time for multiple-word updates
- 4-word/8-byte page read buffer
- 16-word/32-byte write buffer
Low power consumption (typical values at 3.0 V, 5MHz)
- 30 mA typical initial Page read current; 10 mA typical intra-Page read current
- 50 mA typical erase/program current
- 1 A typical standby mode current

SOFTWARE & HARDWARE FEATURES
Software features
- Program Suspend & Resume: read other sectors before programming operation is completed
- Erase Suspend & Resume: read/program other sectors before an erase operation is completed
- Data# polling & toggle bits provide status
- Unlock Bypass Program command reduces overall multiple-word programming time
- CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices
Hardware features
- Sector Group Protection: hardware-level method of preventing write operations within a sector group
- Temporary Sector Unprotect: VID-level method of changing code in locked sectors
- WP#/ACC input:
Write Protect input (WP#) protects top or bottom two sectors regardless of sector protection settings ACC (high voltage) accelerates programming time for higher throughput during system production
- Hardware reset input (RESET#) resets device

SRAM Features
Power dissipation
- Operating: 30 mA maximum
- Standby: 10 A maximum
CE1s# and CE2s Chip Select
Power down features using CE1s# and CE2s
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ7DQ0),UB#s (DQ15DQ8)

Storage Temperature
Plastic Packages . . . . . . . . . . . . . 65 to +150
Ambient Temperature
with Power Applied . . . . . . . . . . . 65 to +125
Voltage with Respect to Ground
VCCf/VCCs (Note 1) . . . . . . . . . . . .0.3 V to +4.0 V
RESET#f (Note 2). . . . . . . . . . . .0.5 V to +12.5 V
WP#/ACC . . . . . . . . . . . . . . . . . .0.5 V to +10.5 V
All other pins (Note 1) . . . . . . 0.5 V to VCC +0.5 V
Output Short Circuit Current (Note 3) . . . . . . 200 mA
Notes:
1. Minimum DC voltage on input or I/O pins is 0.5 V. During voltage transitions, input or I/O pins may overshoot VSS to 2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is VCC +0.5 V. See Figure 10. During voltage transitions, input or I/O pins may overshoot to VCC +2.0 V for periods up to 20 ns. See Figure 11.

2. Minimum DC input voltage on pins A9, OE#, ACC, and RESET# is 0.5 V. During voltage transitions, A9, OE#, ACC, and RESET# may overshoot VSS to 2.0 V for periods of up to 20 ns. See Figure 10. Maximum DC input voltage on pin A9, OE#, ACC, and RESET# is +12.5 V which may overshoot to +14.0 V for periods up to 20 ns.

3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.

The Am41LV3204M is a 32 Mbit, 3.0 volt single power supply flash memory device organized as 2,097,152 words or 4,194,304 bytes. The device has an 8/16-bit bus and can be programmed either in the host system or in standard EPROM programmers. Word mode data appears on DQ15DQ0.

The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers. Am41LV3204M has an access time of 100 ns. Note that the access time has a specific operating voltage range (VCC) as specified in the Product Selector Guide and the Ordering Information sections. The device is offered in a 69-ball Fine Pitch BGA.

Am41LV3204M require only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors.

Am41LV3204M is fully erased when shipped from the factory. Device programming and erasure are initiated through command sequences. Once a program or erase operation has begun, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions.

The hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation.

The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation. The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset circuitry.

A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. Am41LV3204M reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time. The Write Protect (WP#) feature protects the top or bottom two sectors by asserting a logic low on the WP#/ACC pin. The protected sector will still be protected even during accelerated programming.

The SecSi^TM (Secured Silicon) Sector provides a 128-word/256-byte area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur.

AMD MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. Am41LV3204M electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection.