AZ100LVEL16VR

The AZ100LVEL16VR is a specialized oscillator gain stage with high gain output buffer including an enable. The Q_HG/Q_HG outputs have a voltage gain several times greater than the Q/Q outputs.

The AZ100LVEL16VR provides a selectable enable that allows continuous oscillator operation. See truth table below for enable function. If Enable pull-up is desired in the CMOS mode, an external 20k resistor connecting EN to V_CC will override the on-chip pull-down resistor. The AZ100LVEL16VR also provides a V_BB and 470 internal bias resistors from D to V_BB and D to V_BB. The VBB pin can support 1.5mA sink/source current. Bypassing VBB to ground with a 0.01 F capacitor is recommended.

Outputs Q/Q¯ each have a selectable on-chip pull-down current source. See truth table below for current source Mfunctions. External resistors may also be used to increase pull-down current to a maximum total of 25mA.

Outputs QHG/Q¯HG each have an optional on-chip pull-down current source of 10mA. When pad/pin VEEP is left open (NC), the output current sources are disabled and the Q_HG /Q_HG operate as standard PECL/ECL. When V_EEP is connected to V_EE, the current sources are activated. The Q_HG /Q_HG pull-down current can be decreased, by using a resistor to connect from VEEP to V_EE.