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AZ100ELT21

Features: • 3.5ns Typical Propagation Delay• Differential PECL Inputs• CMOS/TTL Outputs• Flow Through Pinouts• Operating Range of 3.0V to 5.5V• Direct Replacement for ON Semiconductor MC100ELT21• Use AZ100ELT21 for 10K ApplicationsPinoutSpecifications ...

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SeekIC No. : 004293134 Detail

AZ100ELT21: Features: • 3.5ns Typical Propagation Delay• Differential PECL Inputs• CMOS/TTL Outputs• Flow Through Pinouts• Operating Range of 3.0V to 5.5V• Direct Replacement...

AZ100ELT21 Data Sheet

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Part Number:
AZ100ELT21
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

• 3.5ns Typical Propagation Delay
• Differential PECL Inputs
• CMOS/TTL Outputs
• Flow Through Pinouts
• Operating Range of 3.0V to 5.5V
• Direct Replacement for ON Semiconductor MC100ELT21
• Use AZ100ELT21 for 10K Applications


Pinout

Connection Diagram


Specifications

Symbol Character Rating Unit
VCC DC Supply Voltage (Referenced to GND) 7.0 V
TA Operating Temperature Range (In Free-Air) -40 to +85 °C
TSTG Storage Temperature Range -65 to +150 °C



Description

The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power are at a premium.

The ELT21 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device.

For single-ended input applications, the VBB reference should be connected to one side of the D0/D0  differential input pair. The input signal is then fed to the other D0/D0  input. The VBB pin should be used only as a bias for the ELT21 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01µF capacitor.
NOTE: Specification in ECL/PECL tables are valid when thermal equilibrium is established.




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