Features: • 80C52X2 Core (6 Clocks per Instruction) Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode Dual Data Pointer Full-duplex Enhanced UART (EUART) Three 16-bit Timer/Counters: T0, T1 and T2 256 Bytes of Scratchpad RAM• 16/32-Kbyte On-chip Flash In-System Programmin...
AT89C5130A-M: Features: • 80C52X2 Core (6 Clocks per Instruction) Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode Dual Data Pointer Full-duplex Enhanced UART (EUART) Three 16-bit Timer/Counte...
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AT89C5130A-M/31A-M is a high-performance Flash version of the 80C51 single-chip 8-bit microcontrollers with full speed USB functions.
AT89C5130A-M/31A-M features a full-speed USB module compatible with the USB specifications Version 1.1 and 2.0. This module integrates the USB transceivers with a 3.3V voltage regulator and the Serial Interface Engine (SIE) with Digital Phase Locked Loop and 48 MHz clock recovery. USB Event detection logic (Reset and Suspend/Resume) and FIFO buffers supporting the mandatory control Endpoint (EP0) and up to 6 versatile Endpoints (EP1/EP2/EP3/EP4/EP5/EP6) with minimum software overhead are also part of the USB module.
AT89C5130A-M/31A-M retains the features of the Atmel 80C52 with extended Flash capacity (16/32-Kbytes), 256 bytes of internal RAM, a 4-level interrupt system, two 16- bit timer/counters (T0/T1), a full duplex enhanced UART (EUART) and an on-chip oscillator.
In addition, AT89C5130A-M/31A-M has an on-chip expanded RAM of 1024 bytes (ERAM), a dual data pointer, a 16-bit up/down Timer (T2), a Programmable Counter Array (PCA), up to 4 programmable LED current sources, a programmable hardware watchdog and a power-on reset.
AT89C5130A-M/31A-M has two software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial ports and the interrupt system are still operating. In the power-down mode the RAM is saved, the peripheral clock is frozen, but the device has full wake-up capability through USB events or external interrupts.