Description
Description
The AT43USB380 is a straightforward upgrade of the AT43USB370 Host/Function Processor to support the USB 2.0 On-The-Go (OTG) specification. AT43USB380 can operate either as a single-chip Host/Function Processor or if used in conjun-ction with an external Atmel Charge Pump, as a full OTG solution.
The AT43USB380 is functionally equivalent to the AT43USB370 as a Host/Function Processor and can be used in place of the AT43USB370 in the existing AT43USB370 design with minor hardware modifications. The pinout differences between the AT43USB370 and the AT43USB380 are due to the inclusion of the on-chip OTG interface in the AT43USB380.
To support OTG functionality, an external Charge Pump has to be connected to the OTG interface of the AT43USB-380, as shown in Figure 1 on page 7. The external Charge Pump serves in the following two capacities:
1. As a power source to the downstream USB devices.
2. As a signaling interface during the OTG session negotiation upon connection.
From the hardware standpoint, the AT43USB380 is equivalent to the AT43USB370 with the following exceptions:
• On-chip OTG Interface. This hardware block is added to the AT43USB380 to upport the OTG functionality. Signals in the OTG interface include ID, DISCHARGE, PUMP, CONTROL, EN, SESS_VLD, SESS_END, SESS_HIGH and SESS_LOW. This interface is used during an OTG session to determine the roles of the AT43USB380 and the connected OTG-enabled USB device either as a host or a function.
• 8/16/32 Bit Generic Host Processor Interface. The AT43USB380 has a variable width, generic host processor interface whereas the AT43USB370 supports only 32-bit host interface. The width of the host interface on the AT43USB380 is determined by firmware configuration.
• Simplified System Interface. The GPIOs required in AT43USB370 for handshaking are no longer required in AT43USB380. The system processor can write directly to the AT43USB380 registers thus eliminates the need for PROG, SEL, READY, DONE, MORE, INTR_IN signals. The WAIT_N signal is not needed either. It is only there for precaution for SYS_CLK synchronization.
• Up to 16 GPIO Pins. GPIO pins are multiplexed with the host processor interface. When the interface to the host processor is 8 or 16 bits, up to 16 of the unused pins in the host processor interface can be used as GPIO pins. High level APIs are provided to access these GPIO pins.
From the standpoint of the firmware development environment, the AT43USB380 shares the same high level APIs and low level firmware libraries with the AT43USB370. Additions to the AT43USB380 firmware suite include:
• High level APIs specific to the OTG support. The number of additional APIs is less than 10.
• Low level OTG firmware embedded in the AT43USB380 hardware that support Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).
The AT43USB380 share the same debugging tools with the AT43USB370 as well. During development, the AT43U-SB380 should be treated as a black box in terms of USB functionality. Communication with the AT43USB380 is achi-eved through a small set (less than 25) of high level, ANSI C-compliant APIs. The actual USB protocol including HNP and SRP is transparent to the host processor.