AT28BV64B

Features:

• Single 2.7V to 3.6V Supply
• Hardware and Software Data Protection
• Low Power Dissipation
  15 mA Active Current
  20 A CMOS Standby Current
• Fast Read Access Time - 200 ns
• Automatic Page Write Operation
  Internal Address and Data Latches for 64 Bytes
  Internal Control Timer
• Fast Write Cycle Times
  Page Write Cycle Time: 10 ms Maximum
  1 to 64 Byte Page Write Operation
• DATA Polling for End of Write Detection
• High-reliability CMOS Technology
  Endurance: 100,000 Cycles
  Data Retention: 10 Years
• JEDEC Approved Byte-wide Pinout
• Commercial and Industrial Temperature Ranges


Pinout




Specifications

Temperature Under Bias................................ -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on OE and A9
with Respect to Ground ...................................-0.6V to +13.5V

 *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability



Description

The AT28BV64B is a high-performance electrically erasable programmable read only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with Atmel's advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation of just 54 mW. When the device is deselected, the CMOS standby current is less than 20 A.

The AT28BV64B is accessed like a static RAM for the read or write cycle without the need for external components. The device contains a 64 byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA polling of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin.

Atmel's AT28BV64B has additional features to ensure high quality and manufacturability. A software data protection mechanism guards against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.