ASM5P2308A

ASM5P2308A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks. It is available in a 16 pin package. The part has an on-chip PLL which locks  to an input clock presented on the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input-to-output propagation delay is guaranteed to be less than 250pS, and the output-to-output skew of ASM5P2305A is guaranteed to be less than 200pS.

The ASM5P2308A has two banks of four outputs each, which can be controlled by the select inputs as shown in the Select Input Decoding Table. The select input also allows the input clock to be directly applied to the outputs for chip and system testing purposes.

Multiple ASM5P2308A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 700pS. 

The ASM5P2308A is available in five different configurations(Refer "ASM5P2308A Configurations" Table). It is the base part, where the output frequencies equal the reference if there is no counter in the feedback path. It is the high-drive version of the -1 and the rise and fall times on this device are much faster. 

The ASM5P2308A-2 allows the user to obtain 2X and 1X frequencies on each output bank. The exact configuration and output frequencies depends on which output drives the feedback pin. That allows the user to obtain 4X and 2X frequencies on the outputs. 

The ASM5P2308A-4 enables the user to obtain 2X clocks on all outputs.  

The ASM5P2308A-5H is a high-drive version with REF/2 on both banks. Thus, the part is extremely versatile, and can be used in a variety of applications.