AK6004A

Features: ADVANCED CMOS EEPROM TECHNOLOGYREAD/WRITE NON-VOLATILE MEMORYWIDE VCC OPERATIONAK6002A 2048 bits, 256 8 organizationAK6004A 4096 bits, 5128organizationAK6008A 16384 bits, 20488 organizationI2CTM SERIAL INTERFACELOW POWER CONSUMPTION- 0.8A max. StandbyHIGH RELIABILITY- Endurance : 100K ...

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SeekIC No. : 004279422 Detail

AK6004A: Features: ADVANCED CMOS EEPROM TECHNOLOGYREAD/WRITE NON-VOLATILE MEMORYWIDE VCC OPERATIONAK6002A 2048 bits, 256 8 organizationAK6004A 4096 bits, 5128organizationAK6008A 16384 bits, 20488 organizati...

floor Price/Ceiling Price

Part Number:
AK6004A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/24

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Product Details

Description



Features:

ADVANCED CMOS EEPROM TECHNOLOGY
READ/WRITE NON-VOLATILE MEMORY
WIDE VCC OPERATION
AK6002A  2048 bits, 256 8
organization
AK6004A  4096 bits, 512 8 
 organization
AK6008A  16384 bits, 20488 organization
I2CTM SERIAL INTERFACE
LOW POWER CONSUMPTION
- 0.8A max. Standby
HIGH RELIABILITY
- Endurance : 100K cycles
- Data Retention : 10 years
16 byte page write mode
Automatic write cycle time-out with auto-ERASE
IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package (SOP, SSOP, TSSOP)




Pinout

  Connection Diagram




Specifications

  Connection Diagram


Description

The AK6002A/04A/08A is a 2048/4096/16384-bit serial CMOS EEPROM divided into 256/512/2048 registers
of 8 bits each.
The AK6002A/04A/08A can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation.
The AK6002A/04A/08A conforms to all specifications in the 2 wire protocol and is controlled by serial clock (SK) and serial data (SDA) line.
Some devices can be connected to the same bus. Each AK6002A/04A/08A connected to the bus is software addressable by a unique address, and can operate as either a transmitter or receiver. In addition to transmitters and receivers, devices can also be considered as masters or slaves when performing data transfers (see Table1).
The master is the device which initiates a data transfers on the bus and generates the clock signals to permit that transfer. At that time, the AK6002A/04A/08A addressed is considered as the slave.
  Connection Diagram



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