ADSP-21992

The ADSP-21992 is a mixed signal DSP controller based on the ADSP-219x DSP Core, suitable for a variety of high performance Industrial Motor Control and Signal Processing applications that require the combination of a high performance DSP and the mixed signal integration of embedded control peripherals such as analog to digital conversion with communications interfaces such as CAN.

The ADSP-21992 integrates the 160 MIPS, fixed point ADSP-219x family base architecture with a serial port, an SPI compatible port, a DMA controller, three programmable timers, general purpose Programmable Flag pins, extensive interrupt capabilities, on chip program and data memory spaces, and a complete set of embedded control peripherals that permits fast motor control and signal processing in a highly integrated environment.

The ADSP-21992 architecture is code compatible with previous ADSP-217x based ADMCxxx products. Although the architectures are compatible, the ADSP-21992, with ADSP-219x architecture, has a number of enhancements over earlier architectures. The enhancements to computational units, data address generators, and program sequencer make the ADSP-21992 more flexible and easier to program than the previous ADSP-21xx embedded DSPs.
Indirect addressing options provide addressing flexibility- premodify with no update, pre- and post-modify by an immediate 8-bit, two's complement value and base address registers for easier implementation of circular buffering. The ADSP-21992 integrates 48K words of on chip memory configured as 32K words (24-bit) of program RAM, and 16K words (16-bit) of data RAM.