ADF4216

Features:

ADF4216: 550 MHz/1.2 GHz
ADF4217: 550 MHz/2.0 GHz
ADF4218: 550 MHz/2.5 GHz
2.7 V to 5.5 V Power Supply
Selectable Charge Pump Currents
Selectable Dual Modulus Prescaler
  IF: 8/9 or 16/17
  RF: 32/33 or 64/65
3-Wire Serial Interface
Power-Down Mode


Application

Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
Base Stations for Wireless Radio (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANS
Communications Test Equipment
CATV Equipment


Pinout




Specifications

V_DD1 to GND³. . . . . . . . . . . . . . . . . . . . . . . .  0.3 V to +7 V
V_DD1 to V_DD2  . . . . . . . . . . . . . . . . . . . . . . .0.3 V to +0.3 V
V_P1, V_P2 to GND  . . . . . . . . . . . . . . . . . . . . . .0.3 V to +7 V
V_P1, V_P2 to V_DD1  . . . . . . . . . . . . . . . . . . . 0.3 V to +5.5 V
Digital I/O Voltage to GND  . . . . . .    0.3 V to DV^_DD + 0.3 V
Analog I/O Voltage to GND  . . . . . . . . . 0.3 V to V^_P + 0.3 V
REF_IN, RFI_NA, RFI_NB,
IF_INA, IF_INB to GND  . . . . . . . . . . .     0.3 V to VDD + 0.3 V
Operating Temperature Range
Industrial (B Version)  . . . . . . . . . . . . . . . .40°C to +85°C
Storage Temperature Range  . . . . . . . . .65°C to +150°C
Maximum Junction Temperature  . . . . . . . . . . . . . . . 150°C
TSSOP _JA Thermal Impedance  . . . . . . . . . . . . 150.4°C/W


Description

The ADF4216/ADF4217/ADF4218 are dual frequency synthesizers that can be used to implement local oscillators (LOs) in the upconversion and downconversion sections of wireless receivers and transmitters. ADF4216/ADF4217/ADF4218  can provide the LO for both the RF and IF sections. ADF4216/ADF4217/ADF4218  consist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P+1). The A (6-bit) and B (11-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase- Locked Loop) can be implemented if the synthesizers are used with an external loop filter and VCOs (Voltage Controlled Oscillators).