AD9884A

The AD9884A is a complete 8-bit 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports display resolutions of up to 1280 ´ 1024 (SXGA) at 75 Hz with sufficient input bandwidth to accurately acquire and digitize each pixel.

To minimize system cost and power dissipation, the AD9884A includes an internal +1.25 V reference, PLL to generate a pixel clock from HSYNC, and programmable gain, offset and clamp circuits. The user provides only a +3.3 V power supply, analog input, and HSYNC signals. Three-state CMOS outputs may be powered by a supply between 2.5 V and 3.3 V.

The AD9884A's on-chip PLL generates a pixel clock from the HSYNC input. Pixel clock output frequencies range from 20 MHz to 140 MHz. PLL clock jitter is typically 400 ps p-p relative to the input reference. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A 32-step sampling phase adjustment is provided. Data, HSYNC and Data Clock output phase relationships are always maintained. The PLL can be disabled and an externa  clock input provided as the pixel clock.

A clamp signal is generated internally or may be provided by the user through the CLAMP input pin. This device AD9884A is fully programmable via a two-wire serial port.

Fabricated in an advanced CMOS process, the AD9884A is provided in a space-saving 128-lead MQFP surface mount plastic package and is specified over a 0°C to +70°C temperature range.