Features: ·10 MHz to 300 MHz input frequency ·6.8 kHz to 270 kHz output signal bandwidth ·7.5 dB SSB NF ·-7.0 dBm IIP3·AGC free range up to -34dBm ·12 dB continuous AGC range ·16 dB front end attenuator ·Baseband I/Q 16-bit (or 24-bit) serial digital output ·LO and sampling clock synthesizers ·Pro...
AD9864*: Features: ·10 MHz to 300 MHz input frequency ·6.8 kHz to 270 kHz output signal bandwidth ·7.5 dB SSB NF ·-7.0 dBm IIP3·AGC free range up to -34dBm ·12 dB continuous AGC range ·16 dB front end attenu...
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Parameter | With Respect to | Min | Max | Unit |
VDDF, VDDA, VDDC | GNDF, GNDA, GNDC, GNDD, | -0.3 | +4.0 | V |
VDDD, VDDH, VDDL, VDDI | GNDH, GNDL, GNDI, GNDS | |||
VDDF, VDDA, VDDC, | VDDR, VDDA, VDDC, | -4.0 | +4.0 | V |
VDDD, VDDH, VDDL, VDDI | VDDD, VDDH, VDDL, VDDI | |||
VDDP, VDDQ | GNDP, GNDQ | -0.3 | +6.0 | V |
GNDF, GNDA, GNDC, GNDD, | GNDF, GNDA, GNDC, GNDD, | -0.3 | +0.3 | V |
GNDH, GNDL, GNDI, GNDQ, GNDP, GNDS | GNDH, GNDL, GNDI, GNDQ, GNDP, GNDS | |||
MXOP, MXON, LOP, | GNDH | -0.3 | VDDI + 0.3 | V |
LON, IFIN, CXIF, CXVL, CXVM | ||||
PC, PD, PE, CLKOUT, | GNDH | -0.3 | VDDH + 0.3 | V |
DOUTA, DOUTB, FS, SYNCB | ||||
IF2N, IF2P, GCP, GCN | GNDF | -0.3 | VDDF + 0.3 | V |
VFEFP, VREGN, RREF | GNDA | -0.3 | VDDA + 0.3 | V |
IOUTC | GNDQ | -0.3 | VDDQ + 0.3 | V |
IOUTL | GNDP | -0.3 | VDDP + 0.3 | V |
CLKP, CLKN | GNDC | -0.3 | VDDC + 0.3 | V |
FREF | GNDL | -0.3 | VDDL + 0.3 | V |
Junction Temperature | 150 | |||
Storage Temperature | -65 | +150 | ||
Lead Temperature | 300 |
The AD9864 is a general-purpose IF subsystem that digitizes a low level 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 kHz to 270 kHz. The signal chain of the AD9864 consists of a low noise amplifier (LNA), a mixer, a band-pass -analog-to-digital converter (ADC), and a deci- mation filter with programmable decimation factor. An auto- matic gain control (AGC) circuit gives the AD9864 12 dB of continuous gain adjustment. Auxiliary blocks include both clock and LO synthesizers.
The high dynamic range of the AD9864 and inherent antialias- ing provided by the band-pass converter allow the device t cope with blocking signals up to 95 dB stronger than the desire signal. This attribute often reduces the cost of a radio by reduc- ing IF filtering requirements. Also, it enables multimode radios of varying channel bandwidths, allowing the IF filter to be specified for the largest channel bandwidth.
The SPI® port programs numerous parameters of the AD9864, allowing the device to be optimized for any given application. Programmable parameters include synthesizer divide ratios, AGC attenuation and attack/decay time, received signal strength level, decimation factor, output data format, 16 dB attenuator, and the selected bias currents.
The AD9864 is available in a 48-lead LFCSP package and operates from a single 2.7 V to 3.6 V supply. The total power consumption is typically 56 mW and a power-down mode is provided via serial interfacing.