ACTS373MS

Features:

• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose 300K RAD (Si)
• Single Event Upset (SEU) Immunity <1 x 10^-10 Errors/Bit-Day (Typ)
• SEU LET Threshold >80 MEV-cm²/mg
• Dose Rate Upset >10¹¹ RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2V Min
• Input Current 1µA at VOL, VOH




Pinout






Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +6.0V
Input Voltage Range, All Inputs . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . .±50mA
Storage Temperature Range (TSTG) . . . . . . . -65oC to +150^oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . +265^oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . +175^oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 1
(All Voltages Reference to VSS)
Thermal Impedance _{JA JC}
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5W
Maximum Device Power Dissipation. . . . . . . . . . . . . . . ..(TBD)W
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Gates




Description

The Intersil ACTS373MS is a radiation hardened octal transparent latch with three-state outputs. The outputs are transparent to the inputs when the latch enable (LE) is high. When theLE goes low, the data is latched. When the Output Enable (OE) is high, the outputs are in the high impedance state. The latch operation is independent of the state of the output enable.

The ACTS373MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family.

The Intersil ACTS373MS is a radiation hardened octal transparent latch with three-state outputs. The outputs are transparent to the inputs when the latch enable (LE) is high. When the LE goes low, the data is latched. When the Output Enable (OE) is high, the outputs are in the high impedance state. The latch operation is independent of the state of the output enable. The ACTS373MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family.