9FG1201HFLF

Propagation Delay (Max) :
Maximum Power Dissipation :
Packaging :
Number of Outputs : 2
Maximum Operating Temperature : + 70 C
Minimum Operating Temperature : 0 C
Supply Voltage - Max : 3.465 V
Supply Voltage - Min : 3.135 V
Max Input Freq : 400 MHz
Package / Case : SSOP-56


Specifications

Temperature C Voltage 3.3 V Package SSOP 56 Speed NA


Description

PCIE BUFFER
ICS9FG1201 follows the Intel DB1200G Differential Buffer Specification. This buffer provides 12 output clocks for CPU Host Bus, PCI Express, or Fully Buffered DIMM applications. The outputsare configured with two groups. Both groups (DIF 9:0) and (DIF 11:10) can be equal to or have a gear ratio to the input clock. A differential CPU clock from a CK410 or CK410B main clock generator, such as the ICS954101 or ICS932S401, drives the ICS9FG1201. ICS9FG1201 can provide outputs up to 400MHz.

ICS9FG1201 Feature Benefits:

Power up default is all outputs in 1:1 mode

DIF_(9:0) can be "gear-shifted" from the input CPU Host Clock

DIF_(11:10) can be "gear-shifted" from the input CPU Host Clock

Spread spectrum compatible

Supports output clock frequencies up to 400 MHz

8 Selectable SMBus addresses

SMBus address determines PLL or Bypass mode