9FG1001AGLF

Specifications

Temperature C Voltage 3.3 V Package TSSOP 56 Speed NA Output Style Core Supply Voltage (VDD) No. of Outputs Min. Output Frequency Min. Input Frequency Output Supply Voltage (VDDO) No. of Inputs Input Style Max. Output Frequency Max. Input Frequency Temp. Grade Multiplication/Divide Value


Description

PCIE BUFFER
The ICS9FG1001 meets or exceeds the performance requiremernts of the DB1200G Differential Buffer Specification Rev0.96 and higher. This buffer provides 10 output clocks for CPU Host Bus, PCI-Express, or Fully Buffered DIMM applications.The inputs can be any of the 7 common CPU Frontside Bus Frequency and the outputs can be either 1:1 with the inputfrequency, or the 133, 166 or 200 MHz for first generation Fully Buffered DIMMs. A differential CPU clock from a CK410 orCK410B main clock generator, such as the ICS954101 or ICS932S401, drives the ICS9FG1001. The ICS9FG1001 canprovide outputs up to 400MHz.