Features: An accelerated 80C51 CPU provides instruction cycle times of 300?00 ns for all instructions except multiply and divide when executing at 20 MHz. Execution at up to 20 MHz whenVDD = 4.5 V to 5.5 VFour-channel multiplexed 8-bit A/D converter. Conversion time of 9.3 mS at fosc = 20 MHz.Two ...
87LPC769: Features: An accelerated 80C51 CPU provides instruction cycle times of 300?00 ns for all instructions except multiply and divide when executing at 20 MHz. Execution at up to 20 MHz whenVDD = 4.5 V t...
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An accelerated 80C51 CPU provides instruction cycle times of 300?00 ns for all instructions except multiply and divide when executing at 20 MHz. Execution at up to 20 MHz when
VDD = 4.5 V to 5.5 V
Four-channel multiplexed 8-bit A/D converter. Conversion time of 9.3 mS at fosc = 20 MHz.
Two Digital to Analog Converter (DAC) outputs. (One D/A output shared with the A/D).
4 Kbytes EPROM code memory.
128 byte RAM data memory.
32-byte customer code EPROM allows serialization of devices, storage of setup parameters, etc.
Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow.
Two analog comparators.
Full duplex UART.
I2C communication port. Eight keypad interrupt inputs, plus two additional external interrupt inputs.
Four interrupt priority levels.
Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog timeout time is selectable from 8 values.
Active low reset. On-chip power-on reset allows operation with no external reset components.
Low voltage reset to allow a graceful system shutdown when power fails. May optionally be configured as an interrupt.
Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator, allowing it to perform an oscillator fail detect function.
Configurable on-chip oscillator with frequency range and RC oscillator options (selected by user programmed EPROM bits). The RC oscillator option allows operation with no external oscillator components.
Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only.
Selectable Schmitt trigger port inputs.
LED drive capability (20 mA) on all port pins.
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times.
15 I/O pins minimum. Up to 18 I/O pins using on-chip oscillator and reset options.
Only power and ground connections are required to operate the 87LPC769 when fully on-chip oscillator and reset options are selected.
Serial EPROM programming allows simple in-circuit production coding. Two EPROM security bits prevent reading of sensitive application programs.
Idle and Power Down reduced power modes. Improved wakeup from Power Down mode (a low interrupt input starts execution).
PARAMETER | RATING | UNIT |
Operating temperature under bias | 55 to +125 | |
Storage temperature range | 65 to +150 | |
Voltage on RST/VPP pin to VSS | 0 to +11.0 | V |
Voltage on any other pin to VSS | 0.5 to VDD+0.5 V | V |
Maximum IOL per I/O pin | 20 | mA |
Power dissipation (based on package heat transfer limitations, not device power consumption) | 1.5 | W |