80C554

Features: • 80C51 central processing unit• 16k * 8 EPROM expandable externally to 64k bytes• An additional 16-bit timer/counter coupled to four capture and three compare registers• Two standard 16-bit timer/counters• 512 * 8 RAM, expandable externally to 64k bytesR...

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80C554 Picture
SeekIC No. : 004253710 Detail

80C554: Features: • 80C51 central processing unit• 16k * 8 EPROM expandable externally to 64k bytes• An additional 16-bit timer/counter coupled to four capture and three compare registers&...

floor Price/Ceiling Price

Part Number:
80C554
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

• 80C51 central processing unit
• 16k * 8 EPROM expandable externally to 64k bytes
• An additional 16-bit timer/counter coupled to four capture and three compare registers
• Two standard 16-bit timer/counters
• 512 * 8 RAM, expandable externally to 64k bytes
• Capable of producing eight synchronized, timed outputs
• A 10-bit ADC with seven multiplexed analog inputs
• Fast 8-bit ADC option 9 mS at 16 MHz
• Two 8-bit resolution, pulse width modulation outputs
• Five 8-bit I/O ports plus one 8-bit input port shared with inputs
• I2C-bus serial I/O port with byte oriented master and slave functions
• On-chip watchdog timer
• Extended temperature ranges
• Full static operation 0 to 16 MHz
• Operating voltage range: 2.7 V to 5.5 V (0 to 8 MHz) and 4.5 V to 5.5 V (8 to 16 MHz) commercial temperature
• Security bits:
ROM 2 bits
OTP/EPROM 3 bits
• 4 level priority interrupt
• 15 interrupt sources
• Full-duplex enhanced UART
Framing error detection
Automatic address recognition
• Power control modes
Clock can be stopped and resumed
Idle mode
Power down mode
• Second DPTR register
• EMI reduction 6 clock operation and ALE inhibit
• Programmable I/O pins
• Wake-up from power-down by external interrupts
• Software reset
• Power-on detect reset
• ADC charge pump disable
• ONCE mode
• ADC active in Idle mode



Pinout

  Connection Diagram


Specifications

PARAMETER RATING UNIT
Storage temperature range 65 to +150 °C
Voltage on EA/VPP to VSS 65 to +13 V
Voltage on any other pin to VSS 0.5 to +6.5 V
Input, output DC current on any single I/O pin 5.0 mA
Power dissipation (based on package heat transfer limitations, not device power
consumption)
1.0 W


NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwisenoted.




Description

This data sheet describes the 6 clock version of the 8xC554. This device is only available in 64L LQFP. The 8xC554 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C554 has the same instruction set as the 80C51. Three versions of the derivative exist:
• 83C554-16k bytes ROM
• 80C554-ROMless version
• 87C554-16k bytes EPROM

The 87C554 contains a 16k * 8 non-volatile EPROM, a 512 * 8 read/write data memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a 15-source, four-priority-level, nested interrupt structure, an 7-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART and I2C-bus), a "watchdog" timer and on-chip oscillator and timing circuits. For systems that require extra capability, the 8xC554 can be expanded using standard TTL compatible memories and logic.

In addition, the 8xC554 has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning. Optionally, the ADC can be operated in Idle mode. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.

8xC554 also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte, and 17 three-byte. With an 8 MHz crystal, 58% of the instructions are executed in 0.75 ms and 40% in 1.5 ms. Multiply and divide instructions require 3 ms.




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