80C51

Features:

*8031/8051 compatible
  4k * 8 ROM (80C51)
  4k * 8 EPROM (87C51)
  ROMless (80C31)
  128 * 8 RAM
  Two 16-bit counter/timers
  Full duplex serial channel
  Boolean processor
*Memory addressing capability
  64k ROM and 64k RAM
*Power control modes:
  Idle mode
  Power-down mode
*CMOS and TTL compatible
*Five speed ranges at V_CC = 5V
  12MHz
  16MHz
  24MHz
  33MHz
*Five package styles
*Extended temperature ranges
*OTP package available


Pinout




Specifications

PARAMETER	RATING	UNIT
Operating temperature under bias	0 to +70 or 40 to +85
Storage temperature range	65 to +150
Voltage on EA/VPP pin to VSS	0 to +13.0	V
Voltage on any other pin to VSS	0.5 to +6.5	V
Maximum IOL per I/O pin	15	mA
Power dissipation (based on package heat transfer limitations, not device power consumption)	1.5	W

NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging   effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V_SS unless otherwisenoted.


Description

The Philips 80C31/80C51/87C51 is a high-performance microcontroller fabricated with Philips high-density CMOS
technology. The CMOS 8XC51 is functionally compatible with the NMOS 8031/8051 microcontrollers. The Philips CMOS technology combines the high speed and density characteristics of HMOS with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity.
The 8XC51 contains a 4k * 8 ROM (80C51) EPROM (87C51), a 128* 8 RAM, 32 I/O lines, two 16-bit counter/timers, a five-source,two-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART,and on-chip oscillator and clock circuits.
In addition, 80C51 has two software selectable modes of power reduction-idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative.