74VHCT373A

High speed: tPD   7.7 ns (typ) at TA   25
High Noise Immunity: VIH   2.0V, VIL   0.8V
Power Down Protection is provided on all inputs and outputs
Low Power Dissipation: ICC=4 A (max) @ TA=25
Pin and Function Compatible with 74HCT373

Supply Voltage (VCC)                                                 -0.5V to7.0V
DC Input Voltage (VIN)                                              -0.5V to7.0V
DC Output Voltage (VOUT)
(Note 3)                                                              -0.5V to VCC0.5V
(Note 4)                                                                      -0.5V to7.0V
Input Diode Current (IIK)                                                       -20 mA
Output Diode Current (IOK)
(Note 5)                                                                                  ±20 mA
DC Output Current (IOUT)                                                       ±25 mA
DC VCC/GND Current (ICC)                                                      ±75 mA
Storage Temperature (TSTG)                                       -65 to150
Lead Temperature (TL)
(Soldering, 10 seconds) 260qC

The 74VHCT373A is an advanced high speed CMOS octal Dtype latch with 3-STATE output fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE ). The latches appear transparent to data when latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. When the OE  input is HIGH, the eight outputs are in a high impedance state.

Protection circuits of the 74VHCT373A ensure that 0V to 7V can be applied to the input and output (Note 1) pins without regard to the supply voltage. This device can be used to interface 3V to 5V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.