Features: HIGHSPEED: tPD = 3.7 ns (TYP.) atVCC= 5V LOWPOWERDISSIPATION: ICC =2 mA (MAX.) at TA =25 oCHIGHNOISEIMMUNITY: VNIH=VNIL =28%VCC (MIN.) POWERDOWN PROTECTIONON INPUTSSYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA(MIN)BALANCEDPROPAGATIONDELAYS: tPLH @ tPHL OPERATINGVOLTAGERANGE: VCC (OPR)...
74VHC00: Features: HIGHSPEED: tPD = 3.7 ns (TYP.) atVCC= 5V LOWPOWERDISSIPATION: ICC =2 mA (MAX.) at TA =25 oCHIGHNOISEIMMUNITY: VNIH=VNIL =28%VCC (MIN.) POWERDOWN PROTECTIONON INPUTSSYMMETRICAL OUTPUT IMPED...
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Symbol |
PARAMETER |
Value
|
Unit |
VCC |
DC Supply Voltage |
0.5 to +7.0 |
V |
VI |
DC Input Voltage |
0.5 3 VI 3 +7.0 |
V |
VO |
DC Output Voltage |
0.5 3 VO 3 +7.0 |
V |
0.5 3 VO 3 VCC + 0.5 | |||
IIK |
DC Input Diode Current |
50 |
mA |
IOK |
DC Output Diode Current |
50 |
mA |
+50 | |||
IO |
DC Output Source/Sink Current |
±50 |
mA |
Tstg |
DC Supply Current Per Supply Pin |
±100 |
mA |
VCC |
Lead Temperature (10 sec) |
300 |
°C |
VCC |
Storage Temperature Range |
65 to +150 |
°C |
The 74VHC00 is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stagesincluding buffer output, which provide high noise immunity and stable output.
Power down protection of the 74VHC00 is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage.