Features: ` HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25` COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN.) VIL = 0.8 (MAX.)` POWER DOWN PROTECTION ON INPUTS` SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN)` BALANCED PROPAGATION DELAYS: tPLH tPHL` O...
74VHCT16373A: Features: ` HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25` COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN.) VIL = 0.8 (MAX.)` POWER DOWN PROTECTION ON INPU...
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Symbol |
Parameter |
Value |
Unit |
VCC |
Supply Voltage |
-0.5 to +7.0 |
V |
VI |
DC Input Voltage |
-0.5 to +7.0 |
V |
VO |
DC BUS I/O Voltage |
-0.5 to VCC + 0.5 |
V |
IIK |
DC Input Diode Current |
- 20 |
mA |
IOK |
DC Output Diode Current |
± 20 |
mA |
IO |
DC Output Current |
±25 |
mA |
ICC or IGND |
DC VCC or Ground Current |
±75 |
mA |
Tstg |
Storage Temperature |
-65 to +150 |
|
TL |
Lead Temperature (10 sec) |
300 |
The 74VHCT16373A is an advanced high-speed CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
These 16 bit D-TYPE latches are byte controlled by two latch enable inputs (nLE) and two output enable inputs(nOE).
While the nLE input is held at a high level, the nQ outputs will follow the data (D) inputs.
When the nLE is taken LOW, the nQ outputs will be latched at the logic level of D data inputs.
When the (nOE) input of the 74VHCT16373A is low, the nQ outputs will be in a normal logic state (high or low logic level);
when nOE is at high level ,the outputs will be in a high impedance state.
Power down protection of the 74VHCT16373A is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
All inputs and outputs of the 74VHCT16373A are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.