74VHCT126A

Features: ` HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25` COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)` POWER DOWN PROTECTION ON INPUTS & OUTPUTS` SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN)` BALANCED PROPAGATION DE...

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74VHCT126A Picture
SeekIC No. : 004251910 Detail

74VHCT126A: Features: ` HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA=25` COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)` POWER DOWN PROTECTION ON IN...

floor Price/Ceiling Price

Part Number:
74VHCT126A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/8

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Product Details

Description



Features:

` HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V
` LOW POWER DISSIPATION:
    ICC = 2 A (MAX.) at TA=25
` COMPATIBLE WITH TTL OUTPUTS:
    VIH = 2V (MIN.), VIL = 0.8V (MAX)
` POWER DOWN PROTECTION ON INPUTS & OUTPUTS
` SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 8 mA (MIN)
` BALANCED PROPAGATION DELAYS:
    tPLH  tPHL
` OPERATING VOLTAGE RANGE:
    VCC(OPR) = 4.5V to 5.5V
`PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 126
` IMPROVED LATCH-UP IMMUNITY
` LOW NOISE: VOLP = 0.8V (MAX.)



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
Supply Voltage
-0.5 to +7.0
V
VI
DC Input Voltage
-0.5 to +7.0
V
VO
DC Output Voltage (see note 1)
-0.5 to +7.0
V
VO
DC Output Voltage (see note 2)
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
- 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
±25
mA
ICC or IGND
DC VCC or Ground Current
±50
mA
Tstg
Storage Temperature
-65 to +150
TL
Lead Temperature (10 sec)
300
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional
operation under these conditions is not implied

1) Output in OFF State
2) High or Low State


Description

The 74VHCT126A is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The device requires the 3-STATE control input G to be set low to place the output in to the high impedance state.

Power down protection of the 74VHCT126A is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold.

All inputs and outputs of the 74VHCT126A are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.




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