74VHCT02A

` HIGHSPEED: t<sub>PD</sub> = 3.5 ns (TYP.) atV<sub>CC</sub>= 5V
` LOWPOWERDISSIPATION:
     I_CC =2 A (MAX.) at T_A =25 ^oC
` COMPATIBLEWITH TTL OUTPUTS:
     V<sub>IH</sub> =2V(MIN),V<sub>IL</sub> = 0.8V(MAX)
` POWERDOWN PROTECTIONON INPUTS& OUTPUTS
` SYMMETRICAL OUTPUT IMPEDANCE:
     |IOH| = IOL = 8 mA(MIN)
` BALANCEDPROPAGATIONDELAYS:
     t_PLH t_PHL
` OPERATINGVOLTAGERANGE:
     V<sub>CC</sub> (OPR)= 4.5Vto 5.5V
` PINANDFUNCTION COMPATIBLEWITH 74 SERIES02
` IMPROVEDLATCH-UP IMMUNITY
` LOWNOISE:V_OLP = 0.8V(Max.)

AbsoluteMaximumRatingsarethose values beyond whichdamage to the device may occur. Functional operation under these condition isnot implied.
1)V_CC =0V
2) High or Low State

The 74VHCT02A is an advanced high-speed CMOS QUAD 2-INPUT NOR GATE fabricatedwith sub-micron silicon gate and double-layer metal wiring C²MOStechnology.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

Power down protection of the 74VHCT02A is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

All inputs and outputs of the 74VHCT02A are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.