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74VHC594

Features: `HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C` HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)` POWER DOWN PROTECTION ON INPUTS` SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN)`BALANCED PROPAGATION DELAYS: tPLH tPHL` OPERATING V...

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SeekIC No. : 004251898 Detail

74VHC594: Features: `HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V` LOW POWER DISSIPATION: ICC = 4 A (MAX.) at TA=25°C` HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)` POWER DOWN PROTECTION ON INPUTS` SYMMETR...

74VHC594 Data Sheet

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Part Number:
74VHC594
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

`HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V
` LOW POWER DISSIPATION:
  ICC = 4 A (MAX.) at TA=25°C
` HIGH NOISE IMMUNITY:
  VNIH = VNIL = 28% VCC (MIN.)
` POWER DOWN PROTECTION ON INPUTS
` SYMMETRICAL OUTPUT IMPEDANCE:
  |IOH| = IOL = 8 mA (MIN)
`BALANCED PROPAGATION DELAYS:
  tPLH tPHL
` OPERATING VOLTAGE RANGE:
  VCC(OPR) = 2V to 5.5V
`PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 594
`IMPROVED LATCH-UP IMMUNITY
`LOW NOISE: VOLP = 0.8V (MAX.)


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current - 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature (10 sec) 300 °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operationunder these conditions is not implied


Description

The 74VHC594 is an high speed CMOS 8-BIT SHIFT REGISTERS fabricated with sub-micron silicon gate C2MOS technology.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SCLR, RCLR) are provided for both the shift register and the storage register.

A serial (QH') output of the 74VHC594 is provided for cascading purposes. Both the shift register and storage register use positive-edge triggered clocks. If the clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register.

Power down protection of the 74VHC594 is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

All inputs of the 74VHC594 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.




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