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74VHC174

Features: `HIGHSPEED: fMAX =175MHz (TYP.) atVCC =5V`LOWPOWERDISSIPATION: ICC =4 A (MAX.) at TA =25 `HIGHNOISEIMMUNITY: VNIH=VNIL =28%VCC (MIN.)`POWERDOWN PROTECTIONON INPUTS`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA(MIN)`BALANCEDPROPAGATIONDELAYS: tPLH @ tPHL`OPERATINGVOLTAGERANGE: VCC (OPR...

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SeekIC No. : 004251873 Detail

74VHC174: Features: `HIGHSPEED: fMAX =175MHz (TYP.) atVCC =5V`LOWPOWERDISSIPATION: ICC =4 A (MAX.) at TA =25 `HIGHNOISEIMMUNITY: VNIH=VNIL =28%VCC (MIN.)`POWERDOWN PROTECTIONON INPUTS`SYMMETRICAL OUTPUT IMPED...

74VHC174 Data Sheet

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Part Number:
74VHC174
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/30

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Product Details

Description



Features:

`HIGHSPEED: fMAX =175MHz (TYP.) atVCC =5V
`LOWPOWERDISSIPATION: ICC =4 A (MAX.) at TA =25 
`HIGHNOISEIMMUNITY: VNIH=VNIL =28%VCC (MIN.)
`POWERDOWN PROTECTIONON INPUTS
`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA(MIN)
`BALANCEDPROPAGATIONDELAYS: tPLH @ tPHL
`OPERATINGVOLTAGERANGE: VCC (OPR)= 2V to 5.5V
`PINANDFUNCTION COMPATIBLEWITH 74 SERIES174
`IMPROVEDLATCH-UP IMMUNITY
`LOWNOISE:VOLP = 0.8V(Max.)


Pinout

Connection Diagram


Specifications

SYMBOL PARAMETER Value UNIT
VCC Supply voltagee 0.5 to+ 7.0 V
VI DC Input Voltage(DIR, G) 0.5 to+ 7.0 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current - 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ±25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
Tstg Storage temperature 65 to 150

TL		 Lead Temperature (10 sec) 300

AbsoluteMaximumRatingsarethose values beyond whichdamage to the device may occur. Functional operation under these condition isnot implied.


Description

The 74VHC174 is an advanced high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

Information signals applied to D inputs are transfered to the Q outputs on the positive going edge of the clock pulse.

When the CLEAR input is held low, the Q outputs are held low independently of the other inputs.

Power down protection of the 74VHC174 is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

All inputs and outputs of the 74VHC174 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.




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