74LVTH16543

 Input and output interface capability to systems at 5V V_CC
 Bushold data inputs eliminate the need for externalpull-up resistors to hold unused inputs (74LVTH16543)
 Also available without bushold feature (74LVT16543)
 Live insertion/extraction permitted
 Power Up/Down high impedance provides glitch-free bus loading
 Outputs source/sink −32 mA/+64 mA
 Functionally compatible with the 74 series 16543
 Latch-up conforms to JEDEC JED78
 ESD performance:
    Human-body model > 2000V
    Machine model > 200V
    Charged-device model > 1000V

The 74LVTH16543  16-bit transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. Each byte has separate control inputs, which can be shorted together for full 16-bit operation.

The 74LVTH16543 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These transceivers are designed for low-voltage (3.3V) V_CC applications, but with the capability to provide a TTL interface to a 5V environment. The 74LVTH16543 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.