Features: Input and output interface capability to systems at 5V VCC Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power up/down high impedance provides glitch-free bus loading Outputs source/sink −32 mA/+64 mA...
74LVTH16500: Features: Input and output interface capability to systems at 5V VCC Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted P...
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Symbol |
Parameter |
Value |
Conditions |
Units |
VCC |
Supply Voltage |
−0.5 to +4.6 |
V | |
VI |
DC Input Voltage |
−0.5 to +7.0 |
V | |
VO |
DC Output Voltage |
−0.5 to +7.0 |
Output in 3-STATE |
V |
−0.5 to +7.0 |
Output in HIGH or LOW State (Note 7) |
V | ||
IIK |
DC Input Diode Current |
−50 |
VI < GND |
mA |
IOK |
DC Output Diode Current |
−50 |
VO < GND |
mA |
IO |
DC Output Current |
64 |
VO > VCC Output at HIGH State |
mA |
128 |
VO > VCC Output at LOW State | |||
ICC |
DC Supply Current per Supply Pin |
±64 |
mA | |
IGND |
DC Ground Current per Ground Pin |
±128 |
mA | |
TSTG |
Storage Temperature |
−65 to +150 |
°C |
The 74LVTH16500 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs.
The 74LVTH16500 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.
The transceiver is designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH16500 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.