74LVT543D

Bus Transceivers 3.3V OCTAL LATCHED XCVR 3-S

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SeekIC No. : 00418458 Detail

74LVT543D: Bus Transceivers 3.3V OCTAL LATCHED XCVR 3-S

floor Price/Ceiling Price

Part Number:
74LVT543D
Mfg:
NXP Semiconductors
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Quick Details

Logic Type : BiCMOS Logic Family : LVT
Number of Channels per Chip : 8 Input Level : LVTTL
Output Level : LVTTL Output Type : 3-State
High Level Output Current : - 32 mA Low Level Output Current : 64 mA
Propagation Delay Time : 3 ns Supply Voltage - Max : 3.6 V
Supply Voltage - Min : 2.7 V Maximum Operating Temperature : + 85 C
Package / Case : SO-24 Packaging : Tube    

Description

Number of Channels per Chip : 8
Output Type : 3-State
Packaging : Tube
Supply Voltage - Max : 3.6 V
Maximum Operating Temperature : + 85 C
Output Level : LVTTL
Supply Voltage - Min : 2.7 V
Input Level : LVTTL
High Level Output Current : - 32 mA
Low Level Output Current : 64 mA
Logic Type : BiCMOS
Logic Family : LVT
Propagation Delay Time : 3 ns
Package / Case : SO-24


Description

The 74LVT543D belongs to 74LVT543 family which is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64mA.

The features of 74LVT543D can be summarized as (1)combines 74LVT245 and 74LVT373 type functions in one device; (2)8-bit octal transceiver with D-type latch; (3)back-to-back registers for storage; (4)separate controls for data flow in each direction; (5)output capability: +64mA/-32mA; (6)TTL input and output switching levels; (7)input and output interface capability to systems at 5V supply; (8)bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs; (9)live insertion/extraction permitted; (10)no bus current loading when output is tied to 5V bus; (11)power-up 3-state; (12)power-up reset; (13)latch-up protection exceeds 500mA per JEDEC Std 17; (14)ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per machine model.

The absolute maximum ratings of 74LVT543D are (1)VCC DC supply voltage: -0.5 to +4.6 V; (2)IIK DC input diode current (VI < 0): -50 mA; (3)VI DC input voltage3: -0.5 to +7.0 V; (4)IOK DC output diode current(VO < 0): -50 mA; (5)VOUT DC output voltage3(output in off or high state): -0.5 to +7.0V; (6)IOUT DC output current(output in low state/output in high state): 128/-64mA; (7)Tstg storage temperature range: -65 to 150 °C.(1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.).




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