74LVT273

• Eight edge-triggered D-type flip-flops
• Buffered common clock
• Buffered asynchronous Master Reset
• Output capability: +64mA/32mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Power-up reset
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Latchup protection exceeds 500 mA per JEDEC Std 17
• ESD protection exceeds 2000V per Mil Std 883 Method 3015 and 200V per Machine Model.

The 74LVT273 is a high-performance BiCMOS product designed for V_CC operation at 3.3V.

This 74LVT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

The register of the 74LVT273 is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output.

All outputs of the 74LVT273 will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common elements.