Features: `HIGHSPEED: fMAX = 180MHz(TYP.) at VCC =3.3V`COMPATIBLEWITH TTL OUTPUTS`LOWPOWERDISSIPATION: ICC =4A (MAX.) at TA =25 `LOWNOISE: VOLP = 0.5 V (TYP.) at VCC = 3.3V`75W TRANSMISSIONLINEDRIVING CAPABILITY`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN)`PCI BUSLEVELSGUARANTEED AT 24m...
74LVQ574: Features: `HIGHSPEED: fMAX = 180MHz(TYP.) at VCC =3.3V`COMPATIBLEWITH TTL OUTPUTS`LOWPOWERDISSIPATION: ICC =4A (MAX.) at TA =25 `LOWNOISE: VOLP = 0.5 V (TYP.) at VCC = 3.3V`75W TRANSMISSIONLINEDRIV...
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SYMBOL | PARAMETER | Value | UNIT |
VCC | Supply voltagee | 0.5 to+ 7 | V |
VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
IIK | DC Input Diode Current | ± 20 | mA |
IOK | DC Output Diode Current | ± 20 | mA |
IO | DC Output Current | ± 50 | mA |
ICC or IGND | DC VCC or Ground Current | ± 400 | mA |
Tstg | Storage temperature | 65 to 150 | |
TL |
Lead Temperature (10 sec) | 300 |
The 74LVQ574 is a low voltage CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise
3.3V applications.
These 8 bit D-Type flip-flops are controlled by a clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q outputs will be set to logic state that were setup at the D inputs.
While the (OE) input is low, the 8 outputs will be in al normal logic state (high or low logic level) and while high level, the outputs will be in a high impedance state.
The output control does not affect the internal operation of flip flop, that is, the old data can be retained or the new data can be entered even while the outputs are off.
It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumpion.
All inputs and outputs of the 74LVQ574 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.