Features: ` HIGHSPEED: tPD = 6 ns (TYP.) atVCC = 3.3V` COMPATIBLEWITH TTL OUTPUTS`LOWPOWERDISSIPATION: ICC =5 A (MAX.) at TA =25 oC`LOWNOISE:VOLP = 0.5V(TYP.) at VCC = 3.3V` 75W TRANSMISSIONLINEDRIVING CAPABILITY`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN)` PCI BUSLEVELSGUARANTEED AT 24...
74LVQ245: Features: ` HIGHSPEED: tPD = 6 ns (TYP.) atVCC = 3.3V` COMPATIBLEWITH TTL OUTPUTS`LOWPOWERDISSIPATION: ICC =5 A (MAX.) at TA =25 oC`LOWNOISE:VOLP = 0.5V(TYP.) at VCC = 3.3V` 75W TRANSMISSIONLINEDRIV...
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` HIGHSPEED: tPD = 6 ns (TYP.) atVCC = 3.3V
` COMPATIBLEWITH TTL OUTPUTS
`LOWPOWERDISSIPATION: ICC =5 A (MAX.) at TA =25 oC
`LOWNOISE:VOLP = 0.5V(TYP.) at VCC = 3.3V
` 75W TRANSMISSIONLINEDRIVING CAPABILITY
`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN)
` PCI BUSLEVELSGUARANTEED AT 24mA
`BALANCEDPROPAGATIONDELAYS: tPLH @ tPHL
`OPERATINGVOLTAGERANGE: VCC (OPR)= 2V to 3.6V (1.2VData Retention)
`PINANDFUNCTION COMPATIBLEWITH 74 SERIES245
`IMPROVEDLATCH-UP IMMUNITY
SYMBOL | PARAMETER | Value | UNIT |
VCC | Supply voltagee | 0.5 to+ 7 | V |
VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
IIK | DC Input Diode Current | ± 20 | mA |
IOK | DC Output Diode Current | ± 20 | mA |
IO | DC Output Current | ± 50 | mA |
ICC or IGND | DC VCC or Ground Current | ± 400 | mA |
Tstg | Storage temperature | 65 to 150 | |
TL |
Lead Temperature (10 sec) | 300 |
The 74LVQ245 is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption.
This IC of the 74LVQ245 is intended for two-way asynchronous communication between data buses; the direction of data trasmission is determined by DIR input.
The enable input G can be used to disable the device so that the buses are effectively isolated.
All inputs and outputs of the 74LVQ245 are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
IT IS PROHIBITED TO APPLY A SIGNAL TO A TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS TERMINAL IS FLOATING (HIGH IMPEDANCE STATE) IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR.